AC phase-controlled bridges — ground and main properties

This work describes the new approach to the improving of the accuracy of the bridge impedance measurements. By this approach, the bridge balance in a wide impedance range uses the control of the phases of the aggregate of the cardinal signals only. The optimal structure and algorithm of the control of this aggregate of the cardinal signals is determined. Using this approach accurate impedance meters with low size and price are developed. In the limit, this approach gets us the possibility to develop fully integrated impedance meters. Report shortly describes universal impedance meters with phase control, their balance and calibration algorithms.


Introduction
Impedance measurement has the long history [1]. However, to this day, the creation of precise equipment with high accuracy, small dimensions and weight, does not cease to be relevant.
To determine the parameters of the impedance, many measurement methods have been proposed. Bridge methods get the highest accuracy of impedance measurement.
Historically, four-arm AC bridges were the first used for accurate impedance measurements [1,2,3]. In these bridges, to achieve balance, the indicator compares two output voltages of two dividers created by the reference standards and the object to be measured. The balancing of bridges is carried out by adjusting one of these voltages using reference resistance and/or capacitance boxes.
In the transformer bridges that appeared later [1,4,5,6], two voltages applied to the impedance standard and the measurement object are created using inductive dividers. To balance the bridge, one of the mentioned voltages is adjusted by switching the number of turns of the inductive divider. Such bridges provide measurement with high accuracy, but they are cumbersome and have a relatively narrow frequency range.
Since the late 70s, the accurate digital-to-analog converters (DAC) have been developed. On this base, AC generators were developed [7,8]. In these generators the DC voltage acts as an input signal, and the output signal is a piecewise approximated sinusoidal voltage (abbreviated -DDS) [8,9]. DDS were used to create various AC bridges [9,10]. In these bridges, amplitude and phase of the balancing signal were directly adjusted using DAC. Accuracy of these bridges isn't too much.
In the mid-90s, intensive works were devoted to creation of AC voltage standards based on the Josephson effect [11]. These standards are precision DDS based on either a piecewise linear approximation of a sine waveform or a pulse-driven Josephson array. These works, in the last decade, were used to develop AC bridges [12,13]. Here two DDS based on the Josephson effect act as two arms of the bridge. The standards being compared act as another two bridge arms. To balance such bridges, the amplitude and phase of these DDS are adjusted with high accuracy. Such bridges are potentially very accurate (if the influence of other sources of error inherent in impedance measurement is completely eliminated). However, their complexity, due to superconductivity, is great.
All these AC bridges use for balance adjustment of the amplitude and phase of the proper voltage sources (or their equivalent). The complexity of such a source determines the technical and economic adjectives of the bridge.
In this work, we propose a new method for adjusting the amplitude of the bridge balancing signal in a wide range of values. This method is based on the adjustment of the phases of the cardinal balancing signals only. Using this approach, we can achieve high accuracy, with small dimensions and weight of the impedance meter.

Optimization of the system of cardinal signals
Let us consider the possibility of changing the signal amplitude by changing only the phases of a set of signals.
It is clear that the amplitude of a single signal only can be changed by changing of its actual amplitude only, but not by changing its frequency ω or phase ϕ. Therefore, consider the sinusoidal voltage U c , which is the sum of k 2 separate coherent sinusoidal voltages U i of the same frequency ω with the amplitude U mi and phase ϕ i : Let the amplitudes of the components of the total voltage U c in (1) be unchangeable constants and cannot be adjusted. Obviously, it is possible to change the amplitude of the total voltage U c only by changing the phase ϕ i of the sinusoidal voltages U i -the sum component. To create a total voltage with the required amplitude, it is necessary to satisfy only one requirement -the sum of the voltage amplitudes in (1) must be greater than the required total signal amplitude.
The voltages U t mi i sin( ) ω ϕ + could be generated using proper DDS s . The phase change error in the DDS is determined only by thermal noise. In the audio frequency domain, the DDS noise can be 10 -8 or less. Therefore, using DDS, we can balance the bridge by two parameters in a wide range of module and phases of the impedance with high accuracy, changing only the phases ϕ i of individual components U i of the U c .
2.1. The voltage system, described by the equation (1), does not let us provide an accurate AC bridge. It needs to be optimized. As the optimization criteria, we'll take the dynamic range of the relative change of the U c and we'll require that this value reach a maximum.
In the process of system (1) optimization it is necessary to answer on the following questions: -What is the optimal number of the voltage sources used? -What should be the ratio of these voltages amplitudes?
-What is the optimal law of the voltages phase control?
To answer on these questions let us consider two cases: -when the number of voltage sources is even; -when the number of voltage sources is odd.
Let the number k 2 of voltage sources in equation (1) be even.
We'll divide the total sum of k 2 voltage sources by k 2 pairs. Then equation (1) takes the form: In the literature, a voltage or current vector is often called a phasor. Here, for brevity, we will extend this term to a device that generates voltage or current according to equations (3), (4).
Equation (4)   From (6) we see that the dynamic range D of the phasor tends to its maximum value (infinity) as r tends to 1. Therefore, we assume that: This equality does not guarantee that the change in the phases of the cardinal voltages will change the amplitude of the output voltage of the phasor only. To determine the law of the phases of cardinal voltages control, we equate to zero the phase of the output voltage of the phasor, which should not change when the phases of the cardinal voltages change, i.e.: where: Ψ 1 j and Ψ 2 j -angles between cardinal voltages U m j 1 , U m j 2 and voltage U mcj .
From (8) with r = 1 we obtain that: Under conditions (7) and (9), the laws of control of the amplitude and phase of the total voltage take the form: The first term on the right-hand side of (11) is the sum of the cardinal voltages pairs. The optimization of these pairs we perform as described above. Let us assume that the amplitude and phase of the voltage U k are constant in time. Then we can consider this voltage as an additive component and easily take it into account in the phasor control algorithm. (6)  However, we can reduce phasor discreteness to negligible values using multi-decade phasors. This question we will discuss below. The noise of the DDS components determines the noise at the output of the phasor. This kind of interference can be reduced by the proper choice of components, but in principle, it cannot be reduced to zero.

Equation
We need to estimate how DDS noise converts into output noise of the phasor and limits its dynamic range. For this purpose, we assume that in each DDS, in addition to cardinal voltages, there are also some noise voltages U n1 ∆ and U n2 ∆ . Taking into account equation (3) From the last equation we find the following expression for the signal-to-noise ratio at the phasor output: Formula (14) shows that at the output of the phasor the noise-to-signal ratio improves by a factor of 2 compared to this ratio at the outputs of the DDS.

If k 2
DDS pairs are used in the phasor, then the signalto-noise ratio at the phasor output is improved by k times. This is a very important property of the phasor.

Bridge balance procedure
To balance the bridge, we will change the phasor output voltage U c by algorithm described above and use the variation method [15]. In accordance with the variation method, we make the variation = +∆ , where U cb is the voltage U c value at the bridge balance, U c0 ∆ is the initial distance between the current state of the bridge and its balance point. Taking this into account, from (15)  ( ( ) We balance the bridge introducing into the phasor the phase increments of the cardinal voltages, calculated according to (16). After that, the voltage U c1 , generated by the phasor, will be equal to: This value of the phasor output voltage is used to calculate the result of the measurement according to the bridge balance equation.
The balance error of the bridge depends on the discreteness of the phasor, the VV discreteness and nonlinearity, noise and interference. Using the modern components, it is easy to construct a VV with a discreteness error of less than 10 -5 and a nonlinearity of less than 10 -4 . Then, without taking into account noise, the error δ 1 of the bridge balance don't exceed 2·10 -4 .
The residual bridge unbalance is . At the second stage of the bridge balance, we reduce the relative value of the variation to a value close to the error δ 1 and, by the same ratio, increase the VV sensitivity. After that, we determine the bridge unbalance . The resulting value we can use in two ways: -if the discreteness of the phasor control is less than the permissible error of the bridge balance, we enter the control code U U U c c c 2 1 1

= +∆
to the phasor and finish the bridge balance; -if the discreteness of the phasor control is large, we perform a simple algebraic summation of the voltages U c1 and . Using obtained voltage value U c2 , we calculate the measurement result.
Excluding noise and interference, the same VV parameters determine the unbalance error δ 2 on the second stage. Therefore, the total error δ c of

Improvement of the phasor discreteness
On the high frequencies the discreteness of the phasor control can be large enough and reach a value of 10 -1 -10 -3 . However the actual error of the phasor remains low and is much less than the phasor discreteness.
We can reduce the phasor discreteness in different ways. One of them we discuss below.
The multi-bit phasor consists of N elementary phasor -decades. Fig. 3 shows the structure of such a phasor. Each i-th decade consists of two DDS ai and DDS bi . Constant voltage source U DC supplies every DDS ai and DDS bi inputs. The outputs of DDS ai and DDS bi are connected to the inputs of the corresponding decade adder ∑ i . The outputs of the adders ∑ i is connected to the additional inputs of the adders ∑ i+1 .
These inputs have the weight coefficients k 1 , k 2 , … k i , … k n . If all decades are the same and have the same absolute U d ∆ and relative discreteness θ , then the coefficients k 2 , k i , … k n must satisfy the conditions: k k k k i n In this case, the expression: determines the total voltage of the N-decade phasor, where: α , β , i , γ -numerical sets in the phasor of the corresponding decade.
N-decade phasor has essential features due to the nonlinear dependence between the control code and the output voltage of the phasor. For simplicity, we'll consider here the two-decade phasor.
The output voltage of a decade phasor has to be continuous function of the summary control code. It means that the range of voltages generated by the phasor of the second decade must be equal to the voltage increment between two neighboring discrete points of the phasor of the first decade.
Equation (17)  With the adopted restrictions, the relative value of the phasor discreteness of the two-decade phasor changes in the entire control range change by 2 times, which is insignificant. The differential error of a two-decade phasor does not exceed half of the discreteness unit of the second decade.

Bridge calibration
Synthesizers accurately change the phase of their output signal. However, the absolute values of the amplitude and phase of their output voltage we know with much less accuracy. To eliminate the proper errors of measurement we calibrate the bridge. This procedure we carry out after the finish of the bridge balancing. It can be done in different ways. Here we consider a method in which each DDS a and DDS b synthesizers are calibrated in turn.
To calibrate one of the synthesizers, the zero code is set and held on the second synthesizer, while the first synthesizer generates an output voltage U a equal to −U 0 .
The calibration algorithm is based on the variation and the permutation methods. It consists of three stages.
At the first stage, the switch C 1 connects the calibration circuit Z 1 -Z 2 between the outputs of the adder ∑ and the synthesizer DDS 0 , and VV, through the switch C 2 , measures its unbalance signal At the third stage, the switch C 1 changes the phase of the calibration circuit connection and VV measures the third unbalance signal I n2 .
Next system of equations describes these proce-   It should be noted that the DDS output amplitudes do not change during the balancing process. Therefore, the non-linearity of the DDS transfer coefficient does not affect the measurement or calibration error of the bridge. However, the voltage amplitude at the output of the adder ∑ varies over a wide range. Therefore, the nonlinearity of the adder ∑ is the part of the measurement error. To increase the linearity of the adder, it can be constructed, for example, using the iterative method [16]. Then the nonlinearity of the transfer function in the audio frequency range can be reduced to values of 10 -6 -10 -7 .
Experimental studies of the bridge with phase balance showed that in the impedance range of 10.0 Ohm -1.0 MOhm, the measurement error doesn't exceed (1-5) · 10 -6 , and the sensitivity of the bridge is not worse than (1-2) · 10 -7 .
Phase balancing in a reduced form we used in a quadrature bridge to compare the parameters of capacitance and resistance standards [17]. The bridge operates at 1.0 kHz and 1.59 kHz. The range of the impedances measurement is 1.0 kOhm -100 kOhm.